| PMC 128MBytes Dual Port Synchronous DRAM Module |
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This page contains features, a description and specifications for the 128M-DPSDRAM module.
FEATURES:
- Dual Port PMC(PCI Mezzanine Card) SDRAM module
- Capacity: 128 Mbytes on 64bit/33MHz PCI
- Burst Mode Transfer Rate - Full Page with 200 Mbytes/sec - Write and 200 Mbytes/sec - Read
- Compatible with PMC Specification Rev. 2.0
- Transparent Refresh Mode during bus access
- Internal clock 66 MHz
- Low voltage 3.3V logic
The 128MDPSDRAM module is a 64 bit wide, high speed dual port PMC bus memory module capable of burst mode accesses from both Ports at full bus bandwidth of 33 MHz. The module is a bus target only. The configuration space header for each Port of the board returns class code of 05H, indicating it is a memory controller. The Memory is organized as area of 16 Synchronous DRAM chips by 8 MB each in 4 Banks. Using a bi-directional FIFO's as a buffer and internal clock at 66 MHz provides fast access to the memory area. PMC bus target controllers are implemented in EPM9560-240 and memory manager controller, in EPM7256S-208 chips from ALTERA.
SPECIFICATIONS:
- Compatibility - PMC Specification Rev.2.0
- Capacity - 128 Mbytes
- Memory speed - 10 cycles read only latency at 33 MHz, one 64 bit data transfer per clock cycle thereafter in burst mode
- Power Requirements - +5V / 900mA
Last modified by me: 06 July 2000
Gueorgui.Antchev@cern.ch